1. Field of the Invention
The invention relates to an amplifying circuit for audio signal, and more particularly to a technology for preventing a popping noise.
2. Description of the Related Art
In an amplifying circuit for audio signal, when sending/receiving signals between plural circuits having different direct-current operating points, a capacitor is generally inserted in the signal route to achieve alternating-current coupling so as to remove the direct-current components.
In alternating-current coupling, however, when the direct-current operating point is changed due to change in operating state of circuit, potential difference between terminals of coupling capacitor is changed, and a charging and discharging current, not a desired audio signal, flows. For example, in a appliance reduced in power consumption, in a mute state free from audio signal, the amplifying circuit is turned off, and when an audio signal is supplied, the amplifying circuit is returned to operating state. In such a case, since the direct-current operating point is changed, “popping” noise may be heard.
FIG. 2 is a block diagram of a conventional amplifying circuit incorporating a popping noise countermeasure.
This amplifying circuit includes an inverting amplifying unit 50a for amplifying an input signal INa, an inverting amplifying unit 50b for amplifying an input signal INb, an adder 60 for adding the output signals of these inverting amplifying units 50a, 50b, and outputting as an output signal OUT, and a charger 70.
The inverting amplifying units 50a, 50b are similar in structure, and the inverting amplifying unit 50a has a coupling capacitor 51 receiving the input signal INa at one end, and the other end of the capacitor 51 is connected to a node N50. The node N50 is connected to inverting input terminal of amplifier (AMP) 54 through resistor 52 and switch 53. A bias voltage VB corresponding to the direct-current operating point in an ordinary operating state is given to non-inverting input terminal of the amplifier 54, and the output terminal of the amplifier 54 is connected to inverting input terminal through resistor 55.
The node N50 of inverting amplifying unit 50a is further connected to the charger 70 through switch 56 and resistor 57. The charger 70 is composed of a voltage follower circuit, and by buffering the bias voltage VB at low impedance, the current flowing in the resistor 57 is prevented from interfering the bias voltage VB or other inverting amplifying unit.
The amplifier 54 is designed to change over the operating state depending on power-down signal/PDa. That is, when the power-down signal/PDa is at L level, the amplifier 54 is in a power-down state and does not amplify and saves current consumption, and the power-down signal/PDa is at H level, it returns to the ordinary operating state.
The power-down signal/PDa is also used in control of switches 53, 56. The switches 53, 56 are turned on when control signal is H, and turned off when L. The switch 53 receives power-down signal/PDa as control signal, and the switch 56 receives power-down signal/PDa inverted by inverter 58 as control signal.
The adder 60 sums output signal OUTa of inverting amplifying unit 50a and output signal OUTb of inverting amplifying unit 50b, and has resistors 61a, 61b for receiving these output signals OUTa, OUTb at one end. The other ends of resistors 61a, 61b are connected to inverting input terminal of an amplifier 62, and bias voltage VB is applied to non-inverting input terminal of the amplifier 62. Output terminal of the amplifier 62 is connected to inverting input terminal through resistor 63, and output signal OUT is output from this output terminal.
The amplifier 62, like the amplifier 54 is of a configuration that can change over the operating state depending on power-down signal/PD. The power-down signal/PD is generated by the logical sum of the power-down signals/PDa, and /PDb at an OR gate 64. That is, when both inverting amplifying units 50a, 50b are in power-down states, the adder 60 is also set to be in a power-down state.
Explanation will be given of the start amplification of input signal INa by the inverting amplifying unit 50a from a condition where the inverting amplifying unit 50b is amplifying only the input signal INb.
When the inverting amplifying unit 50a is in a power-down state, the power-down signal/PDa is at L level. Therefore, the switch 53 is OFF, the switch 56 is ON, and the amplifier 54 is in a power-down state. Hence, the node N50 of inverting amplifying unit 50a and input side of amplifier 54 are disconnected. On the other hand, the node N50 is receiving bias voltage VB from the charger 70 through resistor 57 and switch 56. Hence, the potential of the node N50 is equal to the bias voltage VB. The inverting input terminal of amplifier 54 is connected to the output terminal of this amplifier 54 through resistor 55, and this output terminal is further connected to the adder 60, and hence the potential at this inverting input terminal is equal to the direct-current operating point in an ordinary operating state, that is, bias voltage VB.
When the power-down signal/PDa is changed to H level, the switch 53 is ON, the switch 56 is OFF, and the amplifier 54 is changed to the ordinary operating state. Hence, the node N50 is disconnected from the charger 70, and is connected to the inverting input terminal of amplifier 54 through resistor 52 and switch 53. At this time, the potentials of node N50 and inverting input terminal of amplifier 54 are both equal to the bias voltage VB. Therefore, the potential of inverting input terminal of amplifier 54 is not changed, and a popping noise is not generated.
Japanese Patent Application Laid-Open (JP-A) No. 2004-88419 discloses an amplifying circuit including a switching element connected between input signal line and power source, output circuit control means for controlling the output transistor depending on the voltage in the input signal line, and a delay control circuit for executing control of output transistor by output circuit control means by delaying the time depending on the time constant when switching terminal turn-off signal is given to the control terminal.
In the amplifying circuit, however, since the charger 70 must be always kept in the operating state, there is the problem that the current consumption increases. When having plural inverting amplifying units 50, if the output impedance of charger 70 is high, interference may occur between input signals IN. To suppress interference, a buffer may be inserted in every input, but this leads to other problems such as increase of circuit and increase of current consumption. Further, due to an offset voltage of the amplifying circuit and the buffer, a difference is generated between the operating point at times of ordinary operation and the potential generated by the charger 70, and a voltage change due to the difference appears when changing over, and a popping noise may be caused.
It is hence an object of the invention to suppress a popping noise in a simple circuit configuration.